NXP Semiconductors /LPC408x_7x /SYSCON /FLASHCFG

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as FLASHCFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED0 (FLASH_ACCESSES_USE_1)FLASHTIM 0RESERVED

FLASHTIM=FLASH_ACCESSES_USE_1

Description

Flash Accelerator Configuration Register. Controls flash access timing.

Fields

RESERVED

Reserved, user software should not change these bits from the reset value.

FLASHTIM

Flash access time. The value of this field plus 1 gives the number of CPU clocks used for a flash access. Warning: improper setting of this value may result in incorrect operation of the device. All other values are reserved.

0 (FLASH_ACCESSES_USE_1): Flash accesses use 1 CPU clock. Use for up to 20 MHz CPU clock with power boost off.

1 (FLASH_ACCESSES_USE_2): Flash accesses use 2 CPU clocks. Use for up to 40 MHz CPU clock with power boost off.

2 (FLASH_ACCESSES_USE_3): Flash accesses use 3 CPU clocks. Use for up to 60 MHz CPU clock with power boost off.

3 (FLASH_ACCESSES_USE_4): Flash accesses use 4 CPU clocks. Use for up to 80 MHz CPU clock with power boost off. Use this setting for operation from 100 to 120 MHz operation with power boost on.

4 (FLASH_ACCESSES_USE_5): Flash accesses use 5 CPU clocks. Use for up to 100 MHz CPU clock with power boost off.

5 (FLASH_ACCESSES_USE_6): Flash accesses use 6 CPU clocks. Safe setting for any allowed conditions.

RESERVED

Reserved. Read value is undefined, only zero should be written.

Links

()